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80386 Programmer's Reference Manual -- Opcode AND

AND -- Logical AND

Opcode	Instruction	Clocks	Description	Example
24 ib	andb imm8,al	2	AND immediate byte to AL	`andb $0x7f,%al`
25 iw	andw imm16,ax	2	AND immediate word to AX	`andw $0x7fff,%ax`
25 id	andl imm32,eax	2	AND immediate dword to EAX	`andl $0x7fffffff,%eax`
80 /4 ib	andb imm8,r/m8	2/7	AND immediate byte to r/m byte	`andb $0x7f,%dl andb $0x7f,(%ebx,1) andb $0x7f,m8(%ebx,1) andb $0x7f,m8(%ebx,%ebp,1)`
81 /4 iw	andw imm16,r/m16	2/7	AND immediate word to r/m word	`andw $0x7fff,%cx andw $0x7fff,(%ebx,1) andw $0x7fff,(%ebx,2) andw $0x7fff,(%ebx,%ebp,1)`
81 /4 id	andl imm32,r/m32	2/7	AND immediate dword to r/m dword	`andl $0x7fffffff,%ecx andl $0x7fffffff,(%ebx,2) andl $0x7fffffff,(%ebx,4) andl $0x7fffffff,(%ebx,%ebp,1)`
83 /4 ib	andw imm8,r/m16	2/7	AND sign-extended immediate byte with r/m word	`andw $0x7f,%cx andw $0x7f,(%ebx,1) andw $0x7f,(%ebx,2) andw $0x7f,(%ebx,%ebp,1)`
83 /4 ib	andl imm8,r/m32	2/7	AND sign-extended immediate byte with r/m dword	`andl $0x7f,%ecx andl $0x7f,(%ebx,2) andl $0x7f,(%ebx,4) andl $0x7f,(%ebx,%ebp,1)`
20 /r	andb r8,r/m8	2/7	AND byte register to r/m byte	`andb %bh,%dl andb %bh,(%ebx,1) andb %bh,m8(%ebx,1) andb %bh,m8(%ebx,%ebp,1)`
21 /r	andw r16,r/m16	2/7	AND word register to r/m word	`andw %bx,%cx andw %bx,(%ebx,1) andw %bx,(%ebx,2) andw %bx,(%ebx,%ebp,1)`
21 /r	andl r32,r/m32	2/7	AND dword register to r/m dword	`andl %ebx,%ecx andl %ebx,(%ebx,2) andl %ebx,(%ebx,4) andl %ebx,(%ebx,%ebp,1)`
22 /r	andb r/m8,r8	2/6	AND r/m byte to byte register	`andb %dl,%bh andb (%ebx,1),%bh andb m8(%ebx,1),%bh andb m8(%ebx,%ebp,1),%bh`
23 /r	andw r/m16,r16	2/6	AND r/m word to word register	`andw %cx,%bx andw (%ebx,1),%bx andw (%ebx,2),%bx andw (%ebx,%ebp,1),%bx`
23 /r	andl r/m32,r32	2/6	AND r/m dword to dword register	`andl %ecx,%ebx andl (%ebx,2),%ebx andl (%ebx,4),%ebx andl (%ebx,%ebp,1),%ebx`

Operation




DEST := DEST AND SRC;
CF := 0;
OF := 0;

Description

Each bit of the result of the AND instruction is a 1 if both corresponding bits of the operands are 1; otherwise, it becomes a 0.

Flags Affected

CF := 0, OF := 0; PF, SF, and ZF as described in Appendix C

Protected Mode Exceptions

#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault

Real Address Mode Exceptions

Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH

Virtual 8086 Mode Exceptions

Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault

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