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80386 Programmer's Reference Manual -- Opcode MOV Special Registers

MOV -- Move to/from Special Registers

Opcode	Instruction	Clocks	Description	Example
0F 20 /r	movl cr0/cr2/cr3,r32	6	Move (control register) to (register)	`movl %cr0,%ebx movl %cr2,%ebx movl %cr3,%ebx`
0F 22 /r	movl r32,cr0/cr2/cr3	10/4/5	Move (register) to (control register)	`movl %ebx,%cr0 movl %ebx,%cr2 movl %ebx,%cr3`
0F 21 /r	movl dr0-3,r32	22	Move (debug register) to (register)	`movl %dr0,%ebx`
0F 21 /r	movl dr6/dr7,r32	14	Move (debug register) to (register)	`movl %dr6,%ebx movl %dr7,%ebx`
0F 23 /r	movl r32,dr0-3	22	Move (register) to (debug register)	`movl %ebx,%dr0`
0F 23 /r	movl r32,dr6/dr7	16	Move (register) to (debug register)	`movl %ebx,%dr6 movl %ebx,%dr7`
0F 24 /r	movl tr6/tr7,r32	12	Move (test register) to (register)	`movl %tr6,%ebx movl %tr7,%ebx`
0F 26 /r	movl r32,tr6/tr7	12	Move (register) to (test register)	`movl %ebx,%tr6 movl %ebx,%tr7`

Operation




DEST := SRC;

Description

The above forms of MOV store or load the following special registers in or from a general purpose register:

Control registers CR0, CR2, and CR3
Debug Registers DR0, DR1, DR2, DR3, DR6, and DR7
Test Registers TR6 and TR7

32-bit operands are always used with these instructions, regardless of the operand-size attribute.

Flags Affected

OF, SF, ZF, AF, PF, and CF are undefined

Protected Mode Exceptions

#GP(0) if the current privilege level is not 0

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

#GP(0) if instruction execution is attempted

Notes

The instructions must be executed at privilege level 0 or in real-address mode; otherwise, a protection exception will be raised.

The reg field within the ModRM byte specifies which of the special registers in each category is involved. The two bits in the field are always 11. The r/m field specifies the general register involved.

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