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80386 Programmer's Reference Manual -- Opcode OR

OR -- Logical Inclusive OR

Opcode	Instruction	Clocks	Description	Example
0C ib	orb imm8,al	2	OR immediate byte to AL	`orb $0x7f,%al`
0D iw	orw imm16,ax	2	OR immediate word to AX	`orw $0x7fff,%ax`
0D id	orl imm32,eax	2	OR immediate dword to EAX	`orl $0x7fffffff,%eax`
80 /1 ib	orb imm8,r/m8	2/7	OR immediate byte to r/m byte	`orb $0x7f,%dl orb $0x7f,(%ebx,1) orb $0x7f,m8(%ebx,1) orb $0x7f,m8(%ebx,%ebp,1)`
81 /1 iw	orw imm16,r/m16	2/7	OR immediate word to r/m word	`orw $0x7fff,%cx orw $0x7fff,(%ebx,1) orw $0x7fff,(%ebx,2) orw $0x7fff,(%ebx,%ebp,1)`
81 /1 id	orl imm32,r/m32	2/7	OR immediate dword to r/m dword	`orl $0x7fffffff,%ecx orl $0x7fffffff,(%ebx,2) orl $0x7fffffff,(%ebx,4) orl $0x7fffffff,(%ebx,%ebp,1)`
83 /1 ib	orw imm8,r/m16	2/7	OR sign-extended immediate byte with r/m word	`orw $0x7f,%cx orw $0x7f,(%ebx,1) orw $0x7f,(%ebx,2) orw $0x7f,(%ebx,%ebp,1)`
83 /1 ib	orl imm8,r/m32	2/7	OR sign-extended immediate byte with r/m dword	`orl $0x7f,%ecx orl $0x7f,(%ebx,2) orl $0x7f,(%ebx,4) orl $0x7f,(%ebx,%ebp,1)`
08 /r	orb r8,r/m8	2/6	OR byte register to r/m byte	`orb %bh,%dl orb %bh,(%ebx,1) orb %bh,m8(%ebx,1) orb %bh,m8(%ebx,%ebp,1)`
09 /r	orw r16,r/m16	2/6	OR word register to r/m word	`orw %bx,%cx orw %bx,(%ebx,1) orw %bx,(%ebx,2) orw %bx,(%ebx,%ebp,1)`
09 /r	orl r32,r/m32	2/6	OR dword register to r/m dword	`orl %ebx,%ecx orl %ebx,(%ebx,2) orl %ebx,(%ebx,4) orl %ebx,(%ebx,%ebp,1)`
0A /r	orb r/m8,r8	2/7	OR byte register to r/m byte	`orb %dl,%bh orb (%ebx,1),%bh orb m8(%ebx,1),%bh orb m8(%ebx,%ebp,1),%bh`
0B /r	orw r/m16,r16	2/7	OR word register to r/m word	`orw %cx,%bx orw (%ebx,1),%bx orw (%ebx,2),%bx orw (%ebx,%ebp,1),%bx`
0B /r	orl r/m32,r32	2/7	OR dword register to r/m dword	`orl %ecx,%ebx orl (%ebx,2),%ebx orl (%ebx,4),%ebx orl (%ebx,%ebp,1),%ebx`

Operation




DEST := DEST OR SRC;
CF := 0;
OF := 0

Description

OR computes the inclusive OR of its two operands and places the result in the first operand. Each bit of the result is 0 if both corresponding bits of the operands are 0; otherwise, each bit is 1.

Flags Affected

OF := 0, CF := 0; SF, ZF, and PF as described in Appendix C; AF is undefined

Protected Mode Exceptions

#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault

Real Address Mode Exceptions

Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH

Virtual 8086 Mode Exceptions

Same exceptions as in real-address mode; #PF(fault-code) for a page fault

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