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RCL/RCR/ROL/ROR -- Rotate
Opcode | Instruction | Clocks |
Description | Example |
D0 /2 | rclb 1,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) left once | rclb $1,%dl
rclb $1,(%ebx,1)
rclb $1,m8(%ebx,1)
rclb $1,m8(%ebx,%ebp,1) |
D2 /2 | rclb cl,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) left CL times | rclb %cl,%dl
rclb %cl,(%ebx,1)
rclb %cl,m8(%ebx,1)
rclb %cl,m8(%ebx,%ebp,1) |
C0 /2 ib | rclb imm8,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) left imm8 times | rclb $0x7f,%dl
rclb $0x7f,(%ebx,1)
rclb $0x7f,m8(%ebx,1)
rclb $0x7f,m8(%ebx,%ebp,1) |
D1 /2 | rclw 1,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) left once | rclw $1,%cx
rclw $1,(%ebx,1)
rclw $1,(%ebx,2)
rclw $1,(%ebx,%ebp,1) |
D3 /2 | rclw cl,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) left CL times | rclw %cl,%cx
rclw %cl,(%ebx,1)
rclw %cl,(%ebx,2)
rclw %cl,(%ebx,%ebp,1) |
C1 /2 ib | rclw imm8,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) left imm8 times | rclw $0x7f,%cx
rclw $0x7f,(%ebx,1)
rclw $0x7f,(%ebx,2)
rclw $0x7f,(%ebx,%ebp,1) |
D1 /2 | rcll 1,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) left once | rcll $1,%ecx
rcll $1,(%ebx,2)
rcll $1,(%ebx,4)
rcll $1,(%ebx,%ebp,1) |
D3 /2 | rcll cl,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) left CL times | rcll %cl,%ecx
rcll %cl,(%ebx,2)
rcll %cl,(%ebx,4)
rcll %cl,(%ebx,%ebp,1) |
C1 /2 ib | rcll imm8,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) left imm8 times | rcll $0x7f,%ecx
rcll $0x7f,(%ebx,2)
rcll $0x7f,(%ebx,4)
rcll $0x7f,(%ebx,%ebp,1) |
D0 /3 | rcrb 1,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) right once | rcrb $1,%dl
rcrb $1,(%ebx,1)
rcrb $1,m8(%ebx,1)
rcrb $1,m8(%ebx,%ebp,1) |
D2 /3 | rcrb cl,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) right CL times | rcrb %cl,%dl
rcrb %cl,(%ebx,1)
rcrb %cl,m8(%ebx,1)
rcrb %cl,m8(%ebx,%ebp,1) |
C0 /3 ib | rcrb imm8,r/m8 | 9/10 |
Rotate 9 bits (CF,r/m byte) right imm8 times | rcrb $0x7f,%dl
rcrb $0x7f,(%ebx,1)
rcrb $0x7f,m8(%ebx,1)
rcrb $0x7f,m8(%ebx,%ebp,1) |
D1 /3 | rcrw 1,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) right once | rcrw $1,%cx
rcrw $1,(%ebx,1)
rcrw $1,(%ebx,2)
rcrw $1,(%ebx,%ebp,1) |
D3 /3 | rcrw cl,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) right CL times | rcrw %cl,%cx
rcrw %cl,(%ebx,1)
rcrw %cl,(%ebx,2)
rcrw %cl,(%ebx,%ebp,1) |
C1 /3 ib | rcrw imm8,r/m16 | 9/10 |
Rotate 17 bits (CF,r/m word) right imm8 times | rcrw $0x7f,%cx
rcrw $0x7f,(%ebx,1)
rcrw $0x7f,(%ebx,2)
rcrw $0x7f,(%ebx,%ebp,1) |
D1 /3 | rcrl 1,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) right once | rcrl $1,%ecx
rcrl $1,(%ebx,2)
rcrl $1,(%ebx,4)
rcrl $1,(%ebx,%ebp,1) |
D3 /3 | rcrl cl,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) right CL times | rcrl %cl,%ecx
rcrl %cl,(%ebx,2)
rcrl %cl,(%ebx,4)
rcrl %cl,(%ebx,%ebp,1) |
C1 /3 ib | rcrl imm8,r/m32 | 9/10 |
Rotate 33 bits (CF,r/m dword) right imm8 times | rcrl $0x7f,%ecx
rcrl $0x7f,(%ebx,2)
rcrl $0x7f,(%ebx,4)
rcrl $0x7f,(%ebx,%ebp,1) |
D0 /0 | rolb 1,r/m8 | 3/7 |
Rotate 8 bits r/m byte left once | rolb $1,%dl
rolb $1,(%ebx,1)
rolb $1,m8(%ebx,1)
rolb $1,m8(%ebx,%ebp,1) |
D2 /0 | rolb cl,r/m8 | 3/7 |
Rotate 8 bits r/m byte left CL times | rolb %cl,%dl
rolb %cl,(%ebx,1)
rolb %cl,m8(%ebx,1)
rolb %cl,m8(%ebx,%ebp,1) |
C0 /0 ib | rolb imm8,r/m8 | 3/7 |
Rotate 8 bits r/m byte left imm8 times | rolb $0x7f,%dl
rolb $0x7f,(%ebx,1)
rolb $0x7f,m8(%ebx,1)
rolb $0x7f,m8(%ebx,%ebp,1) |
D1 /0 | rolw 1,r/m16 | 3/7 |
Rotate 16 bits r/m word left once | rolw $1,%cx
rolw $1,(%ebx,1)
rolw $1,(%ebx,2)
rolw $1,(%ebx,%ebp,1) |
D3 /0 | rolw cl,r/m16 | 3/7 |
Rotate 16 bits r/m word left CL times | rolw %cl,%cx
rolw %cl,(%ebx,1)
rolw %cl,(%ebx,2)
rolw %cl,(%ebx,%ebp,1) |
C1 /0 ib | rolw imm8,r/m16 | 3/7 |
Rotate 16 bits r/m word left imm8 times | rolw $0x7f,%cx
rolw $0x7f,(%ebx,1)
rolw $0x7f,(%ebx,2)
rolw $0x7f,(%ebx,%ebp,1) |
D1 /0 | roll 1,r/m32 | 3/7 |
Rotate 32 bits r/m dword left once | roll $1,%ecx
roll $1,(%ebx,2)
roll $1,(%ebx,4)
roll $1,(%ebx,%ebp,1) |
D3 /0 | roll cl,r/m32 | 3/7 |
Rotate 32 bits r/m dword left CL times | roll %cl,%ecx
roll %cl,(%ebx,2)
roll %cl,(%ebx,4)
roll %cl,(%ebx,%ebp,1) |
C1 /0 ib | roll imm8,r/m32 | 3/7 |
Rotate 32 bits r/m dword left imm8 times | roll $0x7f,%ecx
roll $0x7f,(%ebx,2)
roll $0x7f,(%ebx,4)
roll $0x7f,(%ebx,%ebp,1) |
D0 /1 | rorb 1,r/m8 | 3/7 |
Rotate 8 bits r/m byte right once | rorb $1,%dl
rorb $1,(%ebx,1)
rorb $1,m8(%ebx,1)
rorb $1,m8(%ebx,%ebp,1) |
D2 /1 | rorb cl,r/m8 | 3/7 |
Rotate 8 bits r/m byte right CL times | rorb %cl,%dl
rorb %cl,(%ebx,1)
rorb %cl,m8(%ebx,1)
rorb %cl,m8(%ebx,%ebp,1) |
C0 /1 ib | rorb imm8,r/m8 | 3/7 |
Rotate 8 bits r/m word right imm8 times | rorb $0x7f,%dl
rorb $0x7f,(%ebx,1)
rorb $0x7f,m8(%ebx,1)
rorb $0x7f,m8(%ebx,%ebp,1) |
D1 /1 | rorw 1,r/m16 | 3/7 |
Rotate 16 bits r/m word right once | rorw $1,%cx
rorw $1,(%ebx,1)
rorw $1,(%ebx,2)
rorw $1,(%ebx,%ebp,1) |
D3 /1 | rorw cl,r/m16 | 3/7 |
Rotate 16 bits r/m word right CL times | rorw %cl,%cx
rorw %cl,(%ebx,1)
rorw %cl,(%ebx,2)
rorw %cl,(%ebx,%ebp,1) |
C1 /1 ib | rorw imm8,r/m16 | 3/7 |
Rotate 16 bits r/m word right imm8 times | rorw $0x7f,%cx
rorw $0x7f,(%ebx,1)
rorw $0x7f,(%ebx,2)
rorw $0x7f,(%ebx,%ebp,1) |
D1 /1 | rorl 1,r/m32 | 3/7 |
Rotate 32 bits r/m dword right once | rorl $1,%ecx
rorl $1,(%ebx,2)
rorl $1,(%ebx,4)
rorl $1,(%ebx,%ebp,1) |
D3 /1 | rorl cl,r/m32 | 3/7 |
Rotate 32 bits r/m dword right CL times | rorl %cl,%ecx
rorl %cl,(%ebx,2)
rorl %cl,(%ebx,4)
rorl %cl,(%ebx,%ebp,1) |
C1 /1 ib | rorl imm8,r/m32 | 3/7 |
Rotate 32 bits r/m dword right imm8 times | rorl $0x7f,%ecx
rorl $0x7f,(%ebx,2)
rorl $0x7f,(%ebx,4)
rorl $0x7f,(%ebx,%ebp,1) |
Operation
(* ROL - Rotate Left *)
temp := COUNT;
WHILE (temp <> 0)
DO
tmpcf := high-order bit of (r/m);
r/m := r/m * 2 + (tmpcf);
temp := temp - 1;
OD;
IF COUNT = 1
THEN
IF high-order bit of r/m <> CF
THEN OF := 1;
ELSE OF := 0;
FI;
ELSE OF := undefined;
FI;
(* ROR - Rotate Right *)
temp := COUNT;
WHILE (temp <> 0 )
DO
tmpcf := low-order bit of (r/m);
r/m := r/m / 2 + (tmpcf * 2^(width(r/m)));
temp := temp - 1;
DO;
IF COUNT = 1
THEN
IF (high-order bit of r/m) <> (bit next to high-order bit of r/m)
THEN OF := 1;
ELSE OF := 0;
FI;
ELSE OF := undefined;
FI;
Description
Each rotate instruction shifts the bits of the register or memory operand given. The left rotate instructions shift all the bits upward, except for the top bit, which is returned to the bottom. The right rotate instructions do the reverse: the bits shift downward until the bottom bit arrives at the top.
For the RCL and RCR instructions, the carry flag is part of the rotated quantity. RCL shifts the carry flag into the bottom bit and shifts the top bit into the carry flag; RCR shifts the carry flag into the top bit and shifts the bottom bit into the carry flag. For the ROL and ROR instructions, the original value of the carry flag is not a part of the result, but the carry flag receives a copy of the bit that was shifted from one end to the other.
The rotate is repeated the number of times indicated by the second operand, which is either an immediate number or the contents of the CL register. To reduce the maximum instruction execution time, the 80386 does not allow rotation counts greater than 31. If a rotation count greater than 31 is attempted, only the bottom five bits of the rotation are used. The 8086 does not mask rotation counts. The 80386 in Virtual 8086 Mode does mask rotation counts.
The overflow flag is defined only for the single-rotate forms of the instructions (second operand := 1). It is undefined in all other cases. For left shifts/rotates, the CF bit after the shift is XORed with the high-order result bit. For right shifts/rotates, the high-order two bits of the result are XORed to get OF.
Flags Affected
OF only for single rotates; OF is undefined for multi-bit rotates; CF as described above
Protected Mode Exceptions
#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
Real Address Mode Exceptions
Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
Virtual 8086 Mode Exceptions
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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