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SAL/SAR/SHL/SHR -- Shift Instructions
Opcode | Instruction | Clocks |
Description | Example |
D0 /4 | salb 1,r/m8 | 3/7 |
Multiply r/m byte by 2, once | salb $1,%dl
salb $1,(%ebx,1)
salb $1,m8(%ebx,1)
salb $1,m8(%ebx,%ebp,1) |
D2 /4 | salb cl,r/m8 | 3/7 |
Multiply r/m byte by 2, CL times | salb %cl,%dl
salb %cl,(%ebx,1)
salb %cl,m8(%ebx,1)
salb %cl,m8(%ebx,%ebp,1) |
C0 /4 ib | salb imm8,r/m8 | 3/7 |
Multiply r/m byte by 2, imm8 times | salb $0x7f,%dl
salb $0x7f,(%ebx,1)
salb $0x7f,m8(%ebx,1)
salb $0x7f,m8(%ebx,%ebp,1) |
D1 /4 | salw 1,r/m16 | 3/7 |
Multiply r/m word by 2, once | salw $1,%cx
salw $1,(%ebx,1)
salw $1,(%ebx,2)
salw $1,(%ebx,%ebp,1) |
D3 /4 | salw cl,r/m16 | 3/7 |
Multiply r/m word by 2, CL times | salw %cl,%cx
salw %cl,(%ebx,1)
salw %cl,(%ebx,2)
salw %cl,(%ebx,%ebp,1) |
C1 /4 ib | salw imm8,r/m16 | 3/7 |
Multiply r/m word by 2, imm8 times | salw $0x7f,%cx
salw $0x7f,(%ebx,1)
salw $0x7f,(%ebx,2)
salw $0x7f,(%ebx,%ebp,1) |
D1 /4 | sall 1,r/m32 | 3/7 |
Multiply r/m dword by 2, once | sall $1,%ecx
sall $1,(%ebx,2)
sall $1,(%ebx,4)
sall $1,(%ebx,%ebp,1) |
D3 /4 | sall cl,r/m32 | 3/7 |
Multiply r/m dword by 2, CL times | sall %cl,%ecx
sall %cl,(%ebx,2)
sall %cl,(%ebx,4)
sall %cl,(%ebx,%ebp,1) |
C1 /4 ib | sall imm8,r/m32 | 3/7 |
Multiply r/m dword by 2, imm8 times | sall $0x7f,%ecx
sall $0x7f,(%ebx,2)
sall $0x7f,(%ebx,4)
sall $0x7f,(%ebx,%ebp,1) |
D0 /7 | sarb 1,r/m8 | 3/7 |
Signed divide^(1) r/m byte by 2, once | sarb $1,%dl
sarb $1,(%ebx,1)
sarb $1,m8(%ebx,1)
sarb $1,m8(%ebx,%ebp,1) |
D2 /7 | sarb cl,r/m8 | 3/7 |
Signed divide^(1) r/m byte by 2, CL times | sarb %cl,%dl
sarb %cl,(%ebx,1)
sarb %cl,m8(%ebx,1)
sarb %cl,m8(%ebx,%ebp,1) |
C0 /7 ib | sarb imm8,r/m8 | 3/7 |
Signed divide^(1) r/m byte by 2, imm8 times | sarb $0x7f,%dl
sarb $0x7f,(%ebx,1)
sarb $0x7f,m8(%ebx,1)
sarb $0x7f,m8(%ebx,%ebp,1) |
D1 /7 | sarw 1,r/m16 | 3/7 |
Signed divide^(1) r/m word by 2, once | sarw $1,%cx
sarw $1,(%ebx,1)
sarw $1,(%ebx,2)
sarw $1,(%ebx,%ebp,1) |
D3 /7 | sarw cl,r/m16 | 3/7 |
Signed divide^(1) r/m word by 2, CL times | sarw %cl,%cx
sarw %cl,(%ebx,1)
sarw %cl,(%ebx,2)
sarw %cl,(%ebx,%ebp,1) |
C1 /7 ib | sarw imm8,r/m16 | 3/7 |
Signed divide^(1) r/m word by 2, imm8 times | sarw $0x7f,%cx
sarw $0x7f,(%ebx,1)
sarw $0x7f,(%ebx,2)
sarw $0x7f,(%ebx,%ebp,1) |
D1 /7 | sarl 1,r/m32 | 3/7 |
Signed divide^(1) r/m dword by 2, once | sarl $1,%ecx
sarl $1,(%ebx,2)
sarl $1,(%ebx,4)
sarl $1,(%ebx,%ebp,1) |
D3 /7 | sarl cl,r/m32 | 3/7 |
Signed divide^(1) r/m dword by 2, CL times | sarl %cl,%ecx
sarl %cl,(%ebx,2)
sarl %cl,(%ebx,4)
sarl %cl,(%ebx,%ebp,1) |
C1 /7 ib | sarl imm8,r/m32 | 3/7 |
Signed divide^(1) r/m dword by 2, imm8 times | sarl $0x7f,%ecx
sarl $0x7f,(%ebx,2)
sarl $0x7f,(%ebx,4)
sarl $0x7f,(%ebx,%ebp,1) |
D0 /4 | shlb 1,r/m8 | 3/7 |
Multiply r/m byte by 2, once | shlb $1,%dl
shlb $1,(%ebx,1)
shlb $1,m8(%ebx,1)
shlb $1,m8(%ebx,%ebp,1) |
D2 /4 | shlb cl,r/m8 | 3/7 |
Multiply r/m byte by 2, CL times | shlb %cl,%dl
shlb %cl,(%ebx,1)
shlb %cl,m8(%ebx,1)
shlb %cl,m8(%ebx,%ebp,1) |
C0 /4 ib | shlb imm8,r/m8 | 3/7 |
Multiply r/m byte by 2, imm8 times | shlb $0x7f,%dl
shlb $0x7f,(%ebx,1)
shlb $0x7f,m8(%ebx,1)
shlb $0x7f,m8(%ebx,%ebp,1) |
D1 /4 | shlw 1,r/m16 | 3/7 |
Multiply r/m word by 2, once | shlw $1,%cx
shlw $1,(%ebx,1)
shlw $1,(%ebx,2)
shlw $1,(%ebx,%ebp,1) |
D3 /4 | shlw cl,r/m16 | 3/7 |
Multiply r/m word by 2, CL times | shlw %cl,%cx
shlw %cl,(%ebx,1)
shlw %cl,(%ebx,2)
shlw %cl,(%ebx,%ebp,1) |
C1 /4 ib | shlw imm8,r/m16 | 3/7 |
Multiply r/m word by 2, imm8 times | shlw $0x7f,%cx
shlw $0x7f,(%ebx,1)
shlw $0x7f,(%ebx,2)
shlw $0x7f,(%ebx,%ebp,1) |
D1 /4 | shll 1,r/m32 | 3/7 |
Multiply r/m dword by 2, once | shll $1,%ecx
shll $1,(%ebx,2)
shll $1,(%ebx,4)
shll $1,(%ebx,%ebp,1) |
D3 /4 | shll cl,r/m32 | 3/7 |
Multiply r/m dword by 2, CL times | shll %cl,%ecx
shll %cl,(%ebx,2)
shll %cl,(%ebx,4)
shll %cl,(%ebx,%ebp,1) |
C1 /4 ib | shll imm8,r/m32 | 3/7 |
Multiply r/m dword by 2, imm8 times | shll $0x7f,%ecx
shll $0x7f,(%ebx,2)
shll $0x7f,(%ebx,4)
shll $0x7f,(%ebx,%ebp,1) |
D0 /5 | shrb 1,r/m8 | 3/7 |
Unsigned divide r/m byte by 2, once | shrb $1,%dl
shrb $1,(%ebx,1)
shrb $1,m8(%ebx,1)
shrb $1,m8(%ebx,%ebp,1) |
D2 /5 | shrb cl,r/m8 | 3/7 |
Unsigned divide r/m byte by 2, CL times | shrb %cl,%dl
shrb %cl,(%ebx,1)
shrb %cl,m8(%ebx,1)
shrb %cl,m8(%ebx,%ebp,1) |
C0 /5 ib | shrb imm8,r/m8 | 3/7 |
Unsigned divide r/m byte by 2, imm8 times | shrb $0x7f,%dl
shrb $0x7f,(%ebx,1)
shrb $0x7f,m8(%ebx,1)
shrb $0x7f,m8(%ebx,%ebp,1) |
D1 /5 | shrw 1,r/m16 | 3/7 |
Unsigned divide r/m word by 2, once | shrw $1,%cx
shrw $1,(%ebx,1)
shrw $1,(%ebx,2)
shrw $1,(%ebx,%ebp,1) |
D3 /5 | shrw cl,r/m16 | 3/7 |
Unsigned divide r/m word by 2, CL times | shrw %cl,%cx
shrw %cl,(%ebx,1)
shrw %cl,(%ebx,2)
shrw %cl,(%ebx,%ebp,1) |
C1 /5 ib | shrw imm8,r/m16 | 3/7 |
Unsigned divide r/m word by 2, imm8 times | shrw $0x7f,%cx
shrw $0x7f,(%ebx,1)
shrw $0x7f,(%ebx,2)
shrw $0x7f,(%ebx,%ebp,1) |
D1 /5 | shrl 1,r/m32 | 3/7 |
Unsigned divide r/m dword by 2, once | shrl $1,%ecx
shrl $1,(%ebx,2)
shrl $1,(%ebx,4)
shrl $1,(%ebx,%ebp,1) |
D3 /5 | shrl cl,r/m32 | 3/7 |
Unsigned divide r/m dword by 2, CL times | shrl %cl,%ecx
shrl %cl,(%ebx,2)
shrl %cl,(%ebx,4)
shrl %cl,(%ebx,%ebp,1) |
C1 /5 ib | shrl imm8,r/m32 | 3/7 |
Unsigned divide r/m dword by 2, imm8 times | shrl $0x7f,%ecx
shrl $0x7f,(%ebx,2)
shrl $0x7f,(%ebx,4)
shrl $0x7f,(%ebx,%ebp,1) |
Not the same division as IDIV; rounding is toward negative infinity.
Operation
(* COUNT is the second parameter *)
(temp) := COUNT;
WHILE (temp <> 0)
DO
IF instruction is SAL or SHL
THEN CF := high-order bit of r/m;
FI;
IF instruction is SAR or SHR
THEN CF := low-order bit of r/m;
FI;
IF instruction = SAL or SHL
THEN r/m := r/m * 2;
FI;
IF instruction = SAR
THEN r/m := r/m /2 (*Signed divide, rounding toward negative infinity*);
FI;
IF instruction = SHR
THEN r/m := r/m / 2; (* Unsigned divide *);
FI;
temp := temp - 1;
OD;
(* Determine overflow for the various instructions *)
IF COUNT = 1
THEN
IF instruction is SAL or SHL
THEN OF := high-order bit of r/m <> (CF);
FI;
IF instruction is SAR
THEN OF := 0;
FI;
IF instruction is SHR
THEN OF := high-order bit of operand;
FI;
ELSE OF := undefined;
FI;
Description
SAL (or its synonym, SHL) shifts the bits of the operand upward. The high-order bit is shifted into the carry flag, and the low-order bit is set to 0.
SAR and SHR shift the bits of the operand downward. The low-order bit is shifted into the carry flag. The effect is to divide the operand by 2. SAR performs a signed divide with rounding toward negative infinity (not the same as IDIV); the high-order bit remains the same. SHR performs an unsigned divide; the high-order bit is set to 0.
The shift is repeated the number of times indicated by the second operand, which is either an immediate number or the contents of the CL register. To reduce the maximum execution time, the 80386 does not allow shift counts greater than 31. If a shift count greater than 31 is attempted, only the bottom five bits of the shift count are used. (The 8086 uses all eight bits of the shift count.)
The overflow flag is set only if the single-shift forms of the instructions are used. For left shifts, OF is set to 0 if the high bit of the answer is the same as the result of the carry flag (i.e., the top two bits of the original operand were the same); OF is set to 1 if they are different. For SAR, OF is set to 0 for all single shifts. For SHR, OF is set to the high-order bit of the original operand.
Flags Affected
OF for single shifts; OF is undefined for multiple shifts; CF, ZF, PF, and SF as described in Appendix C
Protected Mode Exceptions
#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
Real Address Mode Exceptions
Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
Virtual 8086 Mode Exceptions
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault
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