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80386 Programmer's Reference Manual -- Opcode SAL


SAL/SAR/SHL/SHR -- Shift Instructions

OpcodeInstructionClocks DescriptionExample
D0 /4salb 1,r/m83/7 Multiply r/m byte by 2, oncesalb $1,%dl
salb $1,(%ebx,1)
salb $1,m8(%ebx,1)
salb $1,m8(%ebx,%ebp,1)
D2 /4salb cl,r/m83/7 Multiply r/m byte by 2, CL timessalb %cl,%dl
salb %cl,(%ebx,1)
salb %cl,m8(%ebx,1)
salb %cl,m8(%ebx,%ebp,1)
C0 /4 ibsalb imm8,r/m83/7 Multiply r/m byte by 2, imm8 timessalb $0x7f,%dl
salb $0x7f,(%ebx,1)
salb $0x7f,m8(%ebx,1)
salb $0x7f,m8(%ebx,%ebp,1)
D1 /4salw 1,r/m163/7 Multiply r/m word by 2, oncesalw $1,%cx
salw $1,(%ebx,1)
salw $1,(%ebx,2)
salw $1,(%ebx,%ebp,1)
D3 /4salw cl,r/m163/7 Multiply r/m word by 2, CL timessalw %cl,%cx
salw %cl,(%ebx,1)
salw %cl,(%ebx,2)
salw %cl,(%ebx,%ebp,1)
C1 /4 ibsalw imm8,r/m163/7 Multiply r/m word by 2, imm8 timessalw $0x7f,%cx
salw $0x7f,(%ebx,1)
salw $0x7f,(%ebx,2)
salw $0x7f,(%ebx,%ebp,1)
D1 /4sall 1,r/m323/7 Multiply r/m dword by 2, oncesall $1,%ecx
sall $1,(%ebx,2)
sall $1,(%ebx,4)
sall $1,(%ebx,%ebp,1)
D3 /4sall cl,r/m323/7 Multiply r/m dword by 2, CL timessall %cl,%ecx
sall %cl,(%ebx,2)
sall %cl,(%ebx,4)
sall %cl,(%ebx,%ebp,1)
C1 /4 ibsall imm8,r/m323/7 Multiply r/m dword by 2, imm8 timessall $0x7f,%ecx
sall $0x7f,(%ebx,2)
sall $0x7f,(%ebx,4)
sall $0x7f,(%ebx,%ebp,1)
D0 /7sarb 1,r/m83/7 Signed divide^(1) r/m byte by 2, oncesarb $1,%dl
sarb $1,(%ebx,1)
sarb $1,m8(%ebx,1)
sarb $1,m8(%ebx,%ebp,1)
D2 /7sarb cl,r/m83/7 Signed divide^(1) r/m byte by 2, CL timessarb %cl,%dl
sarb %cl,(%ebx,1)
sarb %cl,m8(%ebx,1)
sarb %cl,m8(%ebx,%ebp,1)
C0 /7 ibsarb imm8,r/m83/7 Signed divide^(1) r/m byte by 2, imm8 timessarb $0x7f,%dl
sarb $0x7f,(%ebx,1)
sarb $0x7f,m8(%ebx,1)
sarb $0x7f,m8(%ebx,%ebp,1)
D1 /7sarw 1,r/m163/7 Signed divide^(1) r/m word by 2, oncesarw $1,%cx
sarw $1,(%ebx,1)
sarw $1,(%ebx,2)
sarw $1,(%ebx,%ebp,1)
D3 /7sarw cl,r/m163/7 Signed divide^(1) r/m word by 2, CL timessarw %cl,%cx
sarw %cl,(%ebx,1)
sarw %cl,(%ebx,2)
sarw %cl,(%ebx,%ebp,1)
C1 /7 ibsarw imm8,r/m163/7 Signed divide^(1) r/m word by 2, imm8 timessarw $0x7f,%cx
sarw $0x7f,(%ebx,1)
sarw $0x7f,(%ebx,2)
sarw $0x7f,(%ebx,%ebp,1)
D1 /7sarl 1,r/m323/7 Signed divide^(1) r/m dword by 2, oncesarl $1,%ecx
sarl $1,(%ebx,2)
sarl $1,(%ebx,4)
sarl $1,(%ebx,%ebp,1)
D3 /7sarl cl,r/m323/7 Signed divide^(1) r/m dword by 2, CL timessarl %cl,%ecx
sarl %cl,(%ebx,2)
sarl %cl,(%ebx,4)
sarl %cl,(%ebx,%ebp,1)
C1 /7 ibsarl imm8,r/m323/7 Signed divide^(1) r/m dword by 2, imm8 timessarl $0x7f,%ecx
sarl $0x7f,(%ebx,2)
sarl $0x7f,(%ebx,4)
sarl $0x7f,(%ebx,%ebp,1)
D0 /4shlb 1,r/m83/7 Multiply r/m byte by 2, onceshlb $1,%dl
shlb $1,(%ebx,1)
shlb $1,m8(%ebx,1)
shlb $1,m8(%ebx,%ebp,1)
D2 /4shlb cl,r/m83/7 Multiply r/m byte by 2, CL timesshlb %cl,%dl
shlb %cl,(%ebx,1)
shlb %cl,m8(%ebx,1)
shlb %cl,m8(%ebx,%ebp,1)
C0 /4 ibshlb imm8,r/m83/7 Multiply r/m byte by 2, imm8 timesshlb $0x7f,%dl
shlb $0x7f,(%ebx,1)
shlb $0x7f,m8(%ebx,1)
shlb $0x7f,m8(%ebx,%ebp,1)
D1 /4shlw 1,r/m163/7 Multiply r/m word by 2, onceshlw $1,%cx
shlw $1,(%ebx,1)
shlw $1,(%ebx,2)
shlw $1,(%ebx,%ebp,1)
D3 /4shlw cl,r/m163/7 Multiply r/m word by 2, CL timesshlw %cl,%cx
shlw %cl,(%ebx,1)
shlw %cl,(%ebx,2)
shlw %cl,(%ebx,%ebp,1)
C1 /4 ibshlw imm8,r/m163/7 Multiply r/m word by 2, imm8 timesshlw $0x7f,%cx
shlw $0x7f,(%ebx,1)
shlw $0x7f,(%ebx,2)
shlw $0x7f,(%ebx,%ebp,1)
D1 /4shll 1,r/m323/7 Multiply r/m dword by 2, onceshll $1,%ecx
shll $1,(%ebx,2)
shll $1,(%ebx,4)
shll $1,(%ebx,%ebp,1)
D3 /4shll cl,r/m323/7 Multiply r/m dword by 2, CL timesshll %cl,%ecx
shll %cl,(%ebx,2)
shll %cl,(%ebx,4)
shll %cl,(%ebx,%ebp,1)
C1 /4 ibshll imm8,r/m323/7 Multiply r/m dword by 2, imm8 timesshll $0x7f,%ecx
shll $0x7f,(%ebx,2)
shll $0x7f,(%ebx,4)
shll $0x7f,(%ebx,%ebp,1)
D0 /5shrb 1,r/m83/7 Unsigned divide r/m byte by 2, onceshrb $1,%dl
shrb $1,(%ebx,1)
shrb $1,m8(%ebx,1)
shrb $1,m8(%ebx,%ebp,1)
D2 /5shrb cl,r/m83/7 Unsigned divide r/m byte by 2, CL timesshrb %cl,%dl
shrb %cl,(%ebx,1)
shrb %cl,m8(%ebx,1)
shrb %cl,m8(%ebx,%ebp,1)
C0 /5 ibshrb imm8,r/m83/7 Unsigned divide r/m byte by 2, imm8 timesshrb $0x7f,%dl
shrb $0x7f,(%ebx,1)
shrb $0x7f,m8(%ebx,1)
shrb $0x7f,m8(%ebx,%ebp,1)
D1 /5shrw 1,r/m163/7 Unsigned divide r/m word by 2, onceshrw $1,%cx
shrw $1,(%ebx,1)
shrw $1,(%ebx,2)
shrw $1,(%ebx,%ebp,1)
D3 /5shrw cl,r/m163/7 Unsigned divide r/m word by 2, CL timesshrw %cl,%cx
shrw %cl,(%ebx,1)
shrw %cl,(%ebx,2)
shrw %cl,(%ebx,%ebp,1)
C1 /5 ibshrw imm8,r/m163/7 Unsigned divide r/m word by 2, imm8 timesshrw $0x7f,%cx
shrw $0x7f,(%ebx,1)
shrw $0x7f,(%ebx,2)
shrw $0x7f,(%ebx,%ebp,1)
D1 /5shrl 1,r/m323/7 Unsigned divide r/m dword by 2, onceshrl $1,%ecx
shrl $1,(%ebx,2)
shrl $1,(%ebx,4)
shrl $1,(%ebx,%ebp,1)
D3 /5shrl cl,r/m323/7 Unsigned divide r/m dword by 2, CL timesshrl %cl,%ecx
shrl %cl,(%ebx,2)
shrl %cl,(%ebx,4)
shrl %cl,(%ebx,%ebp,1)
C1 /5 ibshrl imm8,r/m323/7 Unsigned divide r/m dword by 2, imm8 timesshrl $0x7f,%ecx
shrl $0x7f,(%ebx,2)
shrl $0x7f,(%ebx,4)
shrl $0x7f,(%ebx,%ebp,1)
Not the same division as IDIV; rounding is toward negative infinity.

Operation




(* COUNT is the second parameter *)
(temp) := COUNT;
WHILE (temp <> 0)
DO
   IF instruction is SAL or SHL
   THEN CF := high-order bit of r/m;
   FI;
   IF instruction is SAR or SHR
   THEN CF := low-order bit of r/m;
   FI;
   IF instruction = SAL or SHL
   THEN r/m := r/m * 2;
   FI;
   IF instruction = SAR
   THEN r/m := r/m /2 (*Signed divide, rounding toward negative infinity*);
   FI;
   IF instruction = SHR
   THEN r/m := r/m / 2; (* Unsigned divide *);
   FI;
   temp := temp - 1;
OD;
(* Determine overflow for the various instructions *)
IF COUNT = 1
THEN
   IF instruction is SAL or SHL
   THEN OF := high-order bit of r/m <> (CF);
   FI;
   IF instruction is SAR
   THEN OF := 0;
   FI;
   IF instruction is SHR
   THEN OF := high-order bit of operand;
   FI;
ELSE OF := undefined;
FI;

Description

SAL (or its synonym, SHL) shifts the bits of the operand upward. The high-order bit is shifted into the carry flag, and the low-order bit is set to 0.

SAR and SHR shift the bits of the operand downward. The low-order bit is shifted into the carry flag. The effect is to divide the operand by 2. SAR performs a signed divide with rounding toward negative infinity (not the same as IDIV); the high-order bit remains the same. SHR performs an unsigned divide; the high-order bit is set to 0.

The shift is repeated the number of times indicated by the second operand, which is either an immediate number or the contents of the CL register. To reduce the maximum execution time, the 80386 does not allow shift counts greater than 31. If a shift count greater than 31 is attempted, only the bottom five bits of the shift count are used. (The 8086 uses all eight bits of the shift count.)

The overflow flag is set only if the single-shift forms of the instructions are used. For left shifts, OF is set to 0 if the high bit of the answer is the same as the result of the carry flag (i.e., the top two bits of the original operand were the same); OF is set to 1 if they are different. For SAR, OF is set to 0 for all single shifts. For SHR, OF is set to the high-order bit of the original operand.

Flags Affected

OF for single shifts; OF is undefined for multiple shifts; CF, ZF, PF, and SF as described in Appendix C

Protected Mode Exceptions

#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault

Real Address Mode Exceptions

Interrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH

Virtual 8086 Mode Exceptions

Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault


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